Strain Effects On The Performance Of Silicon Mosfets

A self-consistent solution to the Poisson and Schro umlautdinger's equation considering the strain Hamiltonian combined with the transfer matrix method are used for modeling the tunneling process. Hole and electron mobility is studied for strained p and n-channel MOSFETs at low temperature. Longitudinal compressive stress increased hole mobility enhancement is observed as temperature is lowed from 300K to 87K. With a six band k.p model and finite difference formalism, comparison with calculation suggests hole mobility is phonon-limited at room temperatures, while it is limited by both surface roughness and phonon scattering around 87K. Strain induced mobility enhancement at low temperature arises from the reduction of the average hole conductive effective mass due to band warping. However, surface roughness reduction is the dominant physical mechanism for n-channel MOSFETs. Several physical models are discussed and a reasonable modification of present model is presented. Metal gate induced effective work function change provide a good candidate for work function tuning which is one of the most challenge parts for the present high-k/metal gate devices. Both external mechanical stress and process induced large stress indicated that the effective work function always decrease with the applied stresses regardless the type of stresses. Although the stress induced by the TiN gate strongly depends on the thermal treatment, thermal annealing process generates tension inside the gate. Bowing technique and charge pumping method are used for stress and interface state measurement, respectively. It is indicated that the EWF decrease with the reduction of metal gate thickness and the interface state induced donor-like charge generation is the dominant physical mechanism.