Analysis Of Static And Dynamic Memory Management Schemes In Embedded Systems Utilizing Software Managed Memory

The proposed work targets at data-intensive applications which involve processing of large data arrays within loop nests. Such applications frequently occur in image/video processing domains. The target architectures used in this thesis are both single-core and multi-core embedded systems. In multi-core architecture, each core has a local SPM; and each core accesses other SPMs (remote SPM) and an on-chip shared L2 memory with higher memory access latencies. All on-chip memories are software-managed. Both architectures have off-chip memory which holds the entire dataset. After profiling the embedded application, the dataset is divided into blocks and the access frequencies to these blocks are determined. The data mapping is done to L1 SPMs, L2 SPM and off-chip memory based on the access frequencies of data blocks. This process is done once at compile time in static memory allocation while it is repeated at the beginning of each execution phase at run-time in dynamic data allocation. The experimental results collected using data-intensive benchmark programs are presented in single and multi-core embedded architectural setups.