Fully Integrated Cmos Switched Capacitor Buck Converter Using Three Switching Networks For High Efficiency Over A Wide Range Of Line Voltage

A fully-integrated switched-capacitor DC-DC buck converter is designed in 0.5[mu]m CMOS process for low line regulation from 2.5 VDC to 4.5 VDC that converts to an output voltage of 1.2 ± 0.15 V. This integrated system achieves a maximum efficiency of 70%. The total integrated capacitance is 1.6 nF and the ripple of the output voltage varies from 30 mV to 93 mV. The entire system is built up using transfer capacitors, NMOS capacitor as the load capacitor, CMOS switches, clocked-comparators, various logic gates with driver cells, a clock generator and voltage dividers. The load current is fixed at 3 mA. To achieve low line regulation, three switching networks (2 : 1, 5 : 2, and 3 : 1) are implemented in the system. A multi-layer technique is applied to the layout of the transfer capacitors that helps to reduce parasitic capacitances, thereby improving converter efficiency, and achieve smaller size.