Delay Fault Testing for VLSI Circuits
Language: en
Pages: 201
Authors: Angela Krstic
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

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In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, t
Fault Simulation and Test Generation for Delay Faults
Language: en
Pages: 116
Authors: Bejoy George Oomman
Categories: Fault location (Engineering)
Type: BOOK - Published: 1988 - Publisher:

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Fault Simulation and Test Generation for Small Delay Faults
Language: en
Pages: 130
Authors: Wangqi Qiu
Categories:
Type: BOOK - Published: 2006 - Publisher:

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The ATPG methodology has been implemented on industrial designs. Speed binning has been done on many devices and silicon data has shown significant benefit of t
Test Generation of Crosstalk Delay Faults in VLSI Circuits
Language: en
Pages: 161
Authors: S. Jayanthy
Categories: Technology & Engineering
Type: BOOK - Published: 2018-09-20 - Publisher: Springer

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This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk
Delay Faults
Language: en
Pages: 156
Authors: Sudhakar M. Reddy
Categories: Electronic digital computers
Type: BOOK - Published: 1994 - Publisher:

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