Design And Modeling Of Radiation Hardened Lateral Power Mosfets

Galactic-cosmic-rays (GCR) exist in space from unknown origins. A cosmic ray is a very high energy electron, proton, or heavy ion. As a GCR transverses a power semiconductor device, electron-hole-pairs (ehps) are generated along the ion track. Effects from this are referred to as single-event-effects (SEEs). A subset of a SEE is single-event burnout (SEB) which occurs when the parasitic bipolar junction transistor is triggered leading to thermal runaway. The failure mechanism is a complicated mix of photo-generated current, avalanche generated current, and activation of the inherent parasitic bipolar transistor. Current space-borne power systems lack the utility and advantages of terrestrial power systems. Vertical-double-diffused MOSFETs (VDMOS) is by far the most common power semiconductor device and are very susceptible to SEEs by their vertical structure. Modern space power switches typically require system designers to de-rate the power semiconductor switching device to account for this. Consequently, the power system suffers from increased size, cost, and decreased performance. Their switching speed is limited due to their vertical structure and cannot be used for MHz frequency applications limiting the use of modern digital electronics for space missions. Thus, the Power Semiconductor Research Laboratory at the University of Central Florida in conjunction with Sandia National Laboratories is developing a rad-hard by design lateral-double-diffused MOSFET (LDMOS). The study provides a novel in-depth physical analysis of the mechanisms that cause the LDMOS to burnout during an SEE and provides guidelines for making the LDMOS rad-hard to SEB. Total dose radiation, another important radiation effect, can cause threshold voltage shifts but is beyond the scope of this study. The devices presented have been fabricated with a known total dose radiation hard CMOS process. Single-event burnout data from simulations and experiments are presented in the study to prove the viability of using the LDMOS to replace the VDMOS for space power systems. The LDMOS is capable of higher switching speeds due to a reduced drain-gate feedback capacitance (Miller Capacitor). Since the device is lateral it is compatible with complimentary-metal-oxide-semiconductor (CMOS) processes, lowering developing time and fabrication costs. High switching frequencies permit the use of high density point-of-load conversion and provide a fast dynamic response.