A Low Power Ultra Wideband Transceiver And Sensor Interface Architecture For Wireless Sensor Networks

"This thesis focuses on the design of a low power ultra wideband (UWB) transceiver and a low power sensor interface architecture, both for use in wireless sensor networks.Pulse-based UWB radios communicate using short broadband pulses, which allow the transceiver to be duty cycled such that power is only consumed when a pulse is being transmitted or received. This enables increased power savings when compared to traditional narrowband transceivers. The receiver designed here is based on peak detection, and it is shown that this type of non-coherent receiver can perform better than a more complex energy detection receiver in interference dominated environments (such as urban areas) in both an additive white Gaussian noise channel, and a multipath environment.The fabricated UWB receiver uses a clock and data recovery system to synchronize the local receiver clock to the transmitted data to reduce synchronization time and enable more efficient communications for sensor networks, which typically have a small data payload. By moving the synchronization to the analog domain, the size and power consumption of the digital backend is reduced significantly when compared to other receiver architectures. The clock and data recovery synchronization scheme also provides real time tracking of any variations in the transmitted data rate and the receiver clock, which minimizes the need for a high precision crystal reference in either system. The fabricated UWB transmitter is implemented by exciting a pulse shaping filter with a broadband pulse, and the resulting signal conforms to the FCC spectral mask including the GPS stopband. The demonstrated transceiver system achieves a sensitivity of -66.5 dBm with a power consumption of ~400 [mu]W at a 1 Mbps data rate, making it suitable for wireless sensor networks and other low power, low data rate systems.An architecture for an energy efficient sensor interface for frequency domain sensors is also presented. The proposed system produces a digital output with inherent temperature compensation without the need for a high accuracy temperature sensor, a heater, or a temperature insensitive clock. This architecture is targeted towards systems where the emphasis is placed on battery longevity as opposed to high resolution sensing, such as in wireless sensor nodes." --